Tech Xplore

Ferroelectric memory enables one chip to sample randomness and compute for generative AI

For the first time, a research team has demonstrated an artificial intelligence semiconductor technology that integrates the ...

Application Specific Integrated Circuit Market Size to Grow $38.47 Billion by 2035 | SNS Insider

The U.S. ASIC Market was valued at USD 4.19 Billion in 2025 and is expected to reach USD 7.69 Billion by 2035, at a CAGR of 6.30%. Driven by Surging AI Accelerator Demand from Hyperscalers and Rising ...

Tensordyne Revives Logarithmic Math In A Bid To Cut AI Power Use

Tensordyne says logarithmic computing could reduce AI inference costs and power demands, offering an alternative to conventional chip designs.
IEEE

An Optimized Strassens–Karatsuba Matrix Multiplier Employing CLA using Verilog

Abstract: Efficient matrix multiplication is a crucial issue of AI, signal processing, and computing systems. This paper proposes an optimized matrix multiplication architecture, which incorporates ...
CNBC

Upstart chipmakers keep challenging Nvidia. This time it's Microsoft-backed D-Matrix

D-Matrix says its chips can run inference workloads 10 times faster and using five times less energy than a standalone graphics processing unit from Nvidia. Like Cerebras, D-Matrix is trying to prove ...
IEEE

T-Matrix Method for Large-Scale Arrays of Scatterers With Overlapping Circumscribing Spheres

Abstract: The superposition T-matrix method based on entire-domain vector spherical wave functions (VSWFs) is a powerful technique for analyzing multiple scattering problems in electromagnetic (EM) ...