Startup Oxmiq raises $35 million to build chip architecture to lower cost of AI

Artificial intelligence startup Oxmiq said on Wednesday it raised $35 million from investors in order to build chip ​design ...
The Next Platform

Optical Scale Up Fabrics Are Limited By Manufacturing, Not Architecture

Earlier this spring, AMD, Broadcom, Meta Platforms, Microsoft, Nvidia, and OpenAI formed the Optical Compute Interconnect ...

IBM says new sub-one-nanometer architecture paves the way for the next decade of chip design

IBM Corp. today unveiled what it says is the world’s first sub-one-nanometer chip technology, a research breakthrough that it ...
Electronic Design

Five AI-Based SBCs for Edge Computing and Robotics

These new AI-focused SBCs pair multicore processors with integrated NPUs for edge computing, robotics, and embedded ...
IEEE

Design and Implementation of 5-Stage Pipelined RISC-V Processor on FPGA

Abstract: This paper presents the design and implementation of a 32-bit, in-order, 5-stage pipelined RISC-V processor, executed on the Basys 3 Artix-7 FPGA. RISC-V, an open-source Instruction Set ...
techtimes

Qualcomm Pursues Tenstorrent at Up to $10 Billion: RISC-V Bet on Nvidia’s Blind Spot

logo of US Semiconductor company Qualcomm in the Alpine resort of Davos during the World Economic Forum (WEF) annual meeting. The World Economic Forum takes place in Davos from January 19 to January ...
Digi Times

RISC-V will be 'default ISA of choice' for all new chip designs, architecture's CEO predicts

Andrea Gallo, CEO of RISC-V International, used his appearance at the MIPS Forum during Computex 2026 to declare that RISC-V has completed its transition from academic project to industrial standard — ...
Ars Technica

Nvidia RTX Spark comes to Windows PCs with Arm CPU, RTX GPU, and unified memory

These days, Nvidia primarily sells AI data center products, and its traditional consumer devices feel like more of a side project. But the company occasionally still releases something designed for ...
Electronic Design

RISC-V Core Exceeds RVA23 Requirements

What is the RVA23 RISC-V specification? How does SiFive’s P570 improve upon the specification? The RISC-V RVA23 is a 64-bit specification that requires vector and hypervisor support with cache ...
TechCrunch

Nvidia-backed SiFive hits $3.65B valuation for open AI chips

SiFive, a company founded in 2015 by the UC Berkeley engineers who created an open source chip design, has landed a $400 million oversubscribed round that values the company at $3.65 billion. This ...
SiliconANGLE

RISC-V chip design startup SiFive nabs $400M investment

SiFive Inc., a startup that sells chip designs based on the open-source RISC-V architecture, has raised $400 million in funding at a $3.65 billion valuation. Atreides Management led the Series G round ...